61 search results - page 10 / 13 » Effectively sharing a cache among threads |
DSD
2010
IEEE
13 years 9 months ago
2010
IEEE
— Chip Multiprocessor (CMP) systems have become the reference architecture for designing micro-processors, thanks to the improvements in semiconductor nanotechnology that have co...
DATE
2008
IEEE
14 years 5 months ago
2008
IEEE
This paper proposes a dynamic cache repartitioning technique that enhances compositionality on platforms executing media applications with multiple utilization scenarios. The repa...
CF
2009
ACM
14 years 5 months ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
ICDE
2011
IEEE
13 years 2 months ago
2011
IEEE
Abstract—We propose a novel collaborative caching framework to support spatial query processing in Mobile Peer-toPeer Networks (MP2PNs). To maximize cache sharing among clients, ...
SIGMETRICS
2012
ACM
12 years 1 months ago
2012
ACM
Competition for shared memory resources on multiprocessors is the most dominant cause for slowing down applications and makes their performance varies unpredictably. It exacerbate...