4924 search results - page 138 / 985 » Efficiency Improvement for NTRU |
ADHOCNETS
2009
Springer
13 years 10 months ago
2009
Springer
This paper is a sequel of previous work, in which we have studied the traffic management problem in UMTS. The main objective was to improve the spectral efficiency of cellular netw...
ISCA
2005
IEEE
14 years 1 months ago
2005
IEEE
Runahead execution is a technique that improves processor performance by pre-executing the running application instead of stalling the processor when a long-latency cache miss occ...
EH
2004
IEEE
13 years 12 months ago
2004
IEEE
There exist several approaches to improve the quality of evolution. In this paper, a priori design knowledge as a part of evolving systems is discussed. Further, experiments are r...
FPGA
2006
ACM
13 years 12 months ago
2006
ACM
Abstract-- Increasing device densities allow chip manufacturers to integrate more functionality onto a single piece of silicon. FPGA manufacturers, such as Xilinx and Altera, use t...
ASPLOS
2010
ACM
13 years 11 months ago
2010
ACM
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...