146 search results - page 9 / 30 » Efficiency and redistribution in dynamic mechanism design |
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
The dynamic instruction scheduling logic is one of the most critical components of modern superscalar microprocessors, both from the delay and power dissipation standpoints. The d...
CASES
2006
ACM
13 years 11 months ago
2006
ACM
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
GECCO
2003
Springer
14 years 20 days ago
2003
Springer
This paper suggests dense and switched modular primitives for a bond-graph-based GP design framework that automatically synthesizes designs for multi-domain, lumped parameter dynam...
COMCOM
2008
13 years 7 months ago
2008
We present the definition and performance evaluation of a protocol for building and maintaining a connected backbone among the nodes of a wireless sensor networks (WSN). Building ...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...