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» Efficient Design Error Correction of Digital Circuits
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SPAA
2003
ACM
14 years 1 months ago
The effect of communication costs in solid-state quantum computing architectures
Quantum computation has become an intriguing technology with which to attack difficult problems and to enhance system security. Quantum algorithms, however, have been analyzed un...
Dean Copsey, Mark Oskin, Tzvetan S. Metodi, Freder...
ENTCS
2010
113views more  ENTCS 2010»
13 years 8 months ago
Geometry of Synthesis II: From Games to Delay-Insensitive Circuits
This paper extends previous work on the compilation of higher-order imperative languages into digital circuits [4]. We introduce concurrency, an essential feature in the context o...
Dan R. Ghica, Alex Smith
MICRO
2010
IEEE
132views Hardware» more  MICRO 2010»
13 years 6 months ago
Parichute: Generalized Turbocode-Based Error Correction for Near-Threshold Caches
Energy efficiency is a primary concern for microprocessor designers. A very effective approach to improving the energy efficiency of a chip is to lower its supply voltage to very ...
Timothy N. Miller, Renji Thomas, James Dinan, Bruc...
ISQED
2009
IEEE
126views Hardware» more  ISQED 2009»
14 years 3 months ago
Robust differential asynchronous nanoelectronic circuits
Abstract — Nanoelectronic design faces unprecedented reliability challenges and must achieve noise immunity and delay insensitiveness in the presence of prevalent defects and sig...
Bao Liu
ASPDAC
2006
ACM
109views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Cycle error correction in asynchronous clock modeling for cycle-based simulation
— As the complexity of SoCs is increasing, hardware/software co-verification becomes an important part of system verification. C-level cycle-based simulation could be an efficien...
Junghee Lee, Joonhwan Yi