283 search results - page 51 / 57 » Efficient FPGA hardware development: A multi-language approa... |
CGO
2004
IEEE
13 years 11 months ago
2004
IEEE
To meet the high demand for powerful embedded processors, VLIW architectures are increasingly complex (e.g., multiple clusters), and moreover, they now run increasingly sophistica...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
The advent of general purpose graphics processing units (GPGPU's) brings about a whole new platform for running numerically intensive applications at high speeds. Their multi-...
EUROPAR
2009
Springer
13 years 11 months ago
2009
Springer
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
The majority of current Network on Chip (NoC) architectures employ mesh topology and use simple static routing, to reduce power and area. However, regular mesh topology is unreali...