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ACSAC
2000
IEEE
13 years 12 months ago
The Chinese Remainder Theorem and its Application in a High-Speed RSA Crypto Chip
The performance of RSA hardware is primarily determined by an efficient implementation of the long integer modular arithmetic and the ability to utilize the Chinese Remainder The...
Johann Großschädl
FPL
2010
Springer
267views Hardware» more  FPL 2010»
13 years 5 months ago
A Comparison of Hardware Acceleration Interfaces in a Customizable Soft Core Processor
Due to the continuously decreasing cost of FPGAs, they have become a valid implementation platform for SOCs. Typically, a soft core processor implementation is used to execute the ...
Gerald Hempel, Christian Hochberger, Andreas Koch
ICCAD
2001
IEEE
103views Hardware» more  ICCAD 2001»
14 years 4 months ago
Interconnect Resource-Aware Placement for Hierarchical FPGAs
In this paper, we utilize Rent’s rule as an empirical measure for efficient clustering and placement of circuits on hierarchical FPGAs. We show that careful matching of design c...
Amit Singh, Ganapathy Parthasarathy, Malgorzata Ma...
RTAS
2000
IEEE
13 years 11 months ago
An Approach for Supporting Temporal Partitioning and Software Reuse in Integrated Modular Avionics
The Integrated Modular Avionics (IMA) approach can achieve lower overall hardware costs and reduced level of spares by getting multiple applications that have traditionally been i...
Mohamed F. Younis, Mohamed Aboutabl, Daeyoung Kim
IFIP12
2007
13 years 9 months ago
Hardware Natural Language Interface
In this paper an efficient architecture for natural language processing is presented, implemented in hardware using FPGAs (Field Programmable Gate Arrays). The system can receive s...
Christos Pavlatos, Alexandros C. Dimopoulos, Georg...