286 search results - page 31 / 58 » Efficient Hardware Architectures for Modular Multiplication ... |
FCCM
2009
IEEE
14 years 2 months ago
2009
IEEE
This paper will describe the architecture of a compiler which will convert an untimed C description of a set of floating point expressions into a synthesizable datapath optimized ...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
An important primitive in the hardware implementations of linear DSP transforms is a circuit that can multiply an input value by one of several different preset constants. We prop...
ICPR
2004
IEEE
14 years 8 months ago
2004
IEEE
Pattern recognition and computer vision tasks are computationally intensive, repetitive, and often exceed the capabilities of the CPU, leaving little time for higher level tasks. ...
DAC
2010
ACM
13 years 7 months ago
2010
ACM
Packet-switched networks-on-chip (NoC) have been proposed as an efficient communication infrastructure for multi-core architectures. Adding virtual channels to a NoC helps to avoi...
ICCD
2007
IEEE
14 years 4 months ago
2007
IEEE
Software integrity and confidentiality play a central role in making embedded computer systems resilient to various malicious actions, such as software attacks; probing and tamper...