286 search results - page 38 / 58 » Efficient Hardware Architectures for Modular Multiplication ... |
DDECS
2007
IEEE
14 years 1 months ago
2007
IEEE
—Current system-on-chip implementations integrate IP blocks from different vendors. Typical problems are incompatibility and integration overheads. This paper presents a case stu...
ARC
2008
Springer
13 years 9 months ago
2008
Springer
As Field Programmable Gate Arrays (FPGAs) have reached capacities beyond millions of equivalent gates, it becomes possible to accelerate floating-point scientific computing applica...
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
In this paper, an efficient Montgomery multiplier is introduced for the modular exponentiation operation, which is fundamental to numerous public-key cryptosystems. Four aspects a...
CODES
2010
IEEE
13 years 4 months ago
2010
IEEE
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
SIGARCH
2010
13 years 2 months ago
2010
We describe a programming framework for high performance clusters with various hardware accelerators. In this framework, users can utilize the available heterogeneous resources pr...