286 search results - page 44 / 58 » Efficient Hardware Architectures for Modular Multiplication ... |
3DIC
2009
IEEE
14 years 2 months ago
2009
IEEE
- This paper describes a new architectural paradigm for fully connected, single-hop system level interconnection networks. The architecture is scalable enough to meet the needs of ...
FPL
1998
Springer
13 years 11 months ago
1998
Springer
This paper discusses the memory interface of custom computing machines. We present a high speed parallel memory for the MoM-PDA machine, which is based on the Xputer paradigm. The ...
ISLPED
2010
ACM
13 years 5 months ago
2010
ACM
Power has become the most critical design constraint for embedded handheld devices. This paper proposes a power-efficient SIMD architecture, referred to as Diet SODA, for DSP appl...
ASAP
2004
IEEE
13 years 11 months ago
2004
IEEE
We describe a general-purpose processor architecture for accelerating public-key computations on server systems that demand high performance and flexibility to accommodate large n...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
New media and signal processing applications demand ever higher performance while operating within the tight power constraints of mobile devices. A range of hardware implementatio...