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ERSA
2004
129views Hardware» more  ERSA 2004»
15 years 5 months ago
A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
Jingzhao Ou, Viktor K. Prasanna
FPL
2004
Springer
141views Hardware» more  FPL 2004»
15 years 10 months ago
Automatic Synthesis of Efficient Intrusion Detection Systems on FPGAs
—This paper presents a methodology and a tool for automatic synthesis of highly efficient intrusion detection systems using a high-level, graph-based partitioning methodology and...
Zachary K. Baker, Viktor K. Prasanna
ICCD
2004
IEEE
99views Hardware» more  ICCD 2004»
16 years 1 months ago
An Efficient Algorithm for Reconfiguring Shared Spare RRAM
Redundant rows and columns have been used for years to improve the yield of DRAM fabrication. However, finding a memory repair solution has been proved to be an NP-complete proble...
Hung-Yau Lin, Hong-Zu Chou, Fu-Min Yeh, Ing-Yi Che...
DATE
2008
IEEE
126views Hardware» more  DATE 2008»
15 years 11 months ago
De Bruijn Graph as a Low Latency Scalable Architecture for Energy Efficient Massive NoCs
In this paper, we use the generalized binary de Bruijn (GBDB) graph as a scalable and efficient network topology for an on-chip communication network. Using just two-layer wiring,...
Mohammad Hosseinabady, Mohammad Reza Kakoee, Jimso...
ICCAD
1996
IEEE
123views Hardware» more  ICCAD 1996»
15 years 8 months ago
Efficient solution of systems of Boolean equations
This paper describes an algorithm for the efficient solution of large systems of Boolean equations. The algorithm exploits the fact that, in some cases, the composition operation ...
Scott Woods, Giorgio Casinovi