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CAV
2000
Springer
125views Hardware» more  CAV 2000»
15 years 8 months ago
Efficient Reachability Analysis of Hierarchical Reactive Machines
Hierarchical state machines is a popular visual formalism for software specifications. To apply automated analysis to such specifications, the traditional approach is to compile th...
Rajeev Alur, Radu Grosu, Michael McDougall
DATE
2000
IEEE
92views Hardware» more  DATE 2000»
15 years 8 months ago
An Efficient Heuristic Approach to Solve the Unate Covering Problem
The classical solving approach for two-level logic minimisation reduces the problem to a special case of unate covering and attacks the latter with a (possibly limited) branch-and...
Roberto Cordone, Fabrizio Ferrandi, Donatella Sciu...
FPL
2000
Springer
124views Hardware» more  FPL 2000»
15 years 8 months ago
Balancing Logic Utilization and Area Efficiency in FPGAs
Abstract. In this paper we outline a procedure to determine appropriate partitioning of programmable logic and interconnect area to minimize overall device area across a broad rang...
Russell Tessier, Heather Giza
ISPD
1998
ACM
99views Hardware» more  ISPD 1998»
15 years 8 months ago
New efficient algorithms for computing effective capacitance
We describe a novel iterationless approach for computing the effective capacitance of an interconnect load at a driving gate output. Our new approach is considerably faster than p...
Andrew B. Kahng, Sudhakar Muddu
FPL
2008
Springer
96views Hardware» more  FPL 2008»
15 years 6 months ago
Towards benchmarking energy efficiency of reconfigurable architectures
Energy research in reconfigurable architectures often involves legacy benchmarks such as the MCNC benchmarks. These benchmarks, however, are not well-suited for assessing energy c...
Tobias Becker, Peter Jamieson, Wayne Luk, Peter Y....