2620 search results - page 143 / 524 » Efficient Hardware Voxelization |
147
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DATE
2006
IEEE
15 years 8 months ago
2006
IEEE
The clock latency scheduling problem is usually solved on the sequential graph, also called register-to-register graph. In practice, the the extraction of the sequential graph for...
139
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ASPDAC
2001
ACM
15 years 8 months ago
2001
ACM
Given n points in a plane, a minimum spanning tree is a set of edges which connects all the points and has a minimum total length. A naive approach enumerates edges on all pairs o...
119
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ASYNC
2001
IEEE
15 years 8 months ago
2001
IEEE
This paper presents a new approach to two-level hazardfree sum-of-products logic minimization. No currently available minimizers for single-output literal-exact two-level hazard-f...
238
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HOTDEP
2008
15 years 7 months ago
2008
Storage accounts for a significant amount of a data center's ever increasing power budget. As a consequence, energy consumption has joined performance and reliability as a do...
121
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ASAP
2007
IEEE
15 years 6 months ago
2007
IEEE
This paper presents an optimized design approach of two’s complement large-size squarers using embedded multipliers in FPGAs. The realization is based on BaughWooley’s algorit...