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FPL
2008
Springer
116views Hardware» more  FPL 2008»
15 years 6 months ago
Shared reconfigurable architectures for CMPS
This paper investigates reconfigurable architectures suitable for chip multiprocessors (CMPs). Prior research has established that augmenting a conventional processor with reconfi...
Matthew A. Watkins, Mark J. Cianchetti, David H. A...
FPL
2008
Springer
143views Hardware» more  FPL 2008»
15 years 6 months ago
Fast toggle rate computation for FPGA circuits
This paper presents a fast and scalable method of computing signal toggle rate in FPGA-based circuits. Our technique is a vectorless estimation technique, which can be used in a C...
Tomasz S. Czajkowski, Stephen Dean Brown
118
Voted
ISLPED
2007
ACM
102views Hardware» more  ISLPED 2007»
15 years 6 months ago
Single inductor, multiple input, multiple output (SIMIMO) power mixer-charger-supply system
A hybrid energy source has become a necessary solution for micro-scale applications, like wireless sensors, because of small form factor and extended lifetime requirements. Conven...
Min Chen, Gabriel A. Rincón-Mora
ISLPED
2007
ACM
92views Hardware» more  ISLPED 2007»
15 years 6 months ago
Variable-latency adder (VL-adder): new arithmetic circuit design practice to overcome NBTI
Negative bias temperature instability (NBTI) has become a dominant reliability concern for nanoscale PMOS transistors. In this paper, we propose variable-latency adder (VL-adder) ...
Yiran Chen, Hai Li, Jing Li, Cheng-Kok Koh
ERSA
2006
161views Hardware» more  ERSA 2006»
15 years 6 months ago
A Parametric Study of Scalable Interconnects on FPGAs
Abstract-- With the constantly increasing gate capacity of FPGAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, N...
Daihan Wang, Hiroki Matsutani, Masato Yoshimi, Mic...