A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
9, IO]. However, unlike the case with static timing, it is not so easy We show how recent advances in the handling of correlated interval representations of range uncertainty can b...
As technology evolves into the deep sub-micron era, signal integrity problems are growing into a major challenge. An important source of signal integrity problems is the crosstalk...
modules can be handled in constraint graphs efficiently. This Floorplan area minimization is an important problem because many modules have shape flexibilities during the floorplan...
Fung Yu Young, Chris C. N. Chu, W. S. Luk, Y. C. W...
Computer language paradigms offer linguistic abstractions and proof theories for expressing program implementations. Similarly, system architectures offer the hardware abstractions...
Diomidis Spinellis, Sophia Drossopoulou, Susan Eis...