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DATE
2008
IEEE
163views Hardware» more  DATE 2008»
15 years 10 months ago
Design flow for embedded FPGAs based on a flexible architecture template
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
B. Neumann, Thorsten von Sydow, Holger Blume, Tobi...
DATE
2008
IEEE
182views Hardware» more  DATE 2008»
15 years 10 months ago
A Novel Low Overhead Fault Tolerant Kogge-Stone Adder Using Adaptive Clocking
— As the feature size of transistors gets smaller, fabricating them becomes challenging. Manufacturing process follows various corrective design-for-manufacturing (DFM) steps to ...
Swaroop Ghosh, Patrick Ndai, Kaushik Roy
DATE
2008
IEEE
223views Hardware» more  DATE 2008»
15 years 10 months ago
Cooperative Safety: a Combination of Multiple Technologies
—Governmental Transportation Authorities' interest in Car to Car and Car to Infrastructure has grown dramatically over the last few years in order to increase the road safet...
Raffaele Penazzi, Piergiorgio Capozio, Martin Dunc...
DATE
2008
IEEE
105views Hardware» more  DATE 2008»
15 years 10 months ago
Comparison of Boolean Satisfiability Encodings on FPGA Detailed Routing Problems
We compare 12 new encodings for representing of FPGA detailed routing problems as equivalent Boolean Satisfiability (SAT) problems against the only 2 previously used encodings. We...
Miroslav N. Velev, Ping Gao 0002
136
Voted
MICRO
2008
IEEE
107views Hardware» more  MICRO 2008»
15 years 10 months ago
A distributed processor state management architecture for large-window processors
— Processor architectures with large instruction windows have been proposed to expose more instruction-level parallelism (ILP) and increase performance. Some of the proposed arch...
Isidro Gonzalez, Marco Galluzzi, Alexander V. Veid...