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ICCAD
1999
IEEE
181views Hardware» more  ICCAD 1999»
15 years 8 months ago
A new heuristic for rectilinear Steiner trees
The minimum rectilinear Steiner tree (RST) problem is one of the fundamental problems in the field of electronic design automation. The problem is NP-hard, and much work has been ...
Ion I. Mandoiu, Vijay V. Vazirani, Joseph L. Ganle...
ISCA
1999
IEEE
105views Hardware» more  ISCA 1999»
15 years 8 months ago
The Program Decision Logic Approach to Predicated Execution
Modern compilers must expose sufficient amounts of Instruction-Level Parallelism (ILP) to achieve the promised performance increases of superscalar and VLIW processors. One of the...
David I. August, John W. Sias, Jean-Michel Puiatti...
ISCA
1999
IEEE
124views Hardware» more  ISCA 1999»
15 years 8 months ago
The Block-Based Trace Cache
The trace cache is a recently proposed solution to achieving high instruction fetch bandwidth by buffering and reusing dynamic instruction traces. This work presents a new block-b...
Bryan Black, Bohuslav Rychlik, John Paul Shen
ATS
1998
IEEE
170views Hardware» more  ATS 1998»
15 years 8 months ago
A Ring Architecture Strategy for BIST Test Pattern Generation
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...
Christophe Fagot, Olivier Gascuel, Patrick Girard,...
ITC
1998
IEEE
120views Hardware» more  ITC 1998»
15 years 8 months ago
Test generation in VLSI circuits for crosstalk noise
This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital c...
Weiyu Chen, Sandeep K. Gupta, Melvin A. Breuer