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IPPS
2007
IEEE
14 years 2 months ago
An Architectural Framework for Automated Streaming Kernel Selection
Hardware accelerators are increasingly used to extend the computational capabilities of baseline scalar processors to meet the growing performance and power requirements of embedd...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...
FPL
2010
Springer
267views Hardware» more  FPL 2010»
13 years 5 months ago
A Comparison of Hardware Acceleration Interfaces in a Customizable Soft Core Processor
Due to the continuously decreasing cost of FPGAs, they have become a valid implementation platform for SOCs. Typically, a soft core processor implementation is used to execute the ...
Gerald Hempel, Christian Hochberger, Andreas Koch
FPL
2007
Springer
190views Hardware» more  FPL 2007»
14 years 2 months ago
The ANDRES Project: Analysis and Design of Run-Time Reconfigurable, Heterogeneous Systems
Today’s heterogeneous embedded systems combine components from different domains, such as software, analogue hardware and digital hardware. The design and implementation of thes...
Andreas Herrholz, Frank Oppenheimer, Philipp A. Ha...
ICPR
2004
IEEE
14 years 9 months ago
Using Multiple Graphics Cards as a General Purpose Parallel Computer : Applications to Computer Vision
Pattern recognition and computer vision tasks are computationally intensive, repetitive, and often exceed the capabilities of the CPU, leaving little time for higher level tasks. ...
James Fung, Steve Mann
DATE
2006
IEEE
88views Hardware» more  DATE 2006»
14 years 1 months ago
Temporal partitioning for image processing based on time-space complexity in reconfigurable architectures
Temporal partitioning techniques are useful to implement large and complex applications, which can be split into partitions in FPGA devices. In order to minimize resources, each o...
Paulo Sérgio B. do Nascimento, Manoel Euseb...