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MICRO
2008
IEEE
118views Hardware» more  MICRO 2008»
14 years 2 months ago
Notary: Hardware techniques to enhance signatures
Hardware signatures have been recently proposed as an efficient mechanism to detect conflicts amongst concurrently running transactions in transactional memory systems (e.g., Bulk...
Luke Yen, Stark C. Draper, Mark D. Hill
TVLSI
2002
100views more  TVLSI 2002»
13 years 8 months ago
Architectural strategies for low-power VLSI turbo decoders
Abstract--The use of "turbo codes" has been proposed for several applications, including the development of wireless systems, where highly reliable transmission is requir...
Guido Masera, M. Mazza, Gianluca Piccinini, F. Vig...
FCCM
2005
IEEE
89views VLSI» more  FCCM 2005»
14 years 2 months ago
A General Purpose, Highly Efficient Communication Controller Architecture for Hardware Acceleration Platforms
Although researchers have presented individual techniques to efficiently utilize the Peripheral Component Interconnect (PCI) bus, their contributions fail to provide a direct path...
Petersen F. Curt, James P. Durbano, Fernando E. Or...
EENERGY
2010
13 years 9 months ago
A simple analytical model for the energy-efficient activation of access points in dense WLANs
Energy efficient networks are becoming a hot research topic, and the networking community is increasingly devoting its attention to the identification of approaches to save energy...
Marco Ajmone Marsan, Luca Chiaraviglio, Delia Ciul...
VLSID
2009
IEEE
96views VLSI» more  VLSID 2009»
14 years 9 months ago
Efficient Placement of Compressed Code for Parallel Decompression
Code compression is important in embedded systems design since it reduces the code size (memory requirement) and thereby improves overall area, power and performance. Existing res...
Xiaoke Qin, Prabhat Mishra