391 search results - page 49 / 79 » Efficient Self-Reconfigurable Implementations Using On-chip ... |
VLSID
2006
IEEE
14 years 8 months ago
2006
IEEE
In this paper a new technique for partial product reduction based on the use of look-up tables for efficient processing is presented. We describe how to construct counter devices ...
EUROPAR
2008
Springer
13 years 9 months ago
2008
Springer
Over the last decade, Message Passing Interface (MPI) has become a very successful parallel programming environment for distributed memory architectures such as clusters. However, ...
ISCC
2005
IEEE
14 years 1 months ago
2005
IEEE
—A framework for designing a family of novel fast CRC generation algorithms is presented. Our algorithms can ideally read arbitrarily large amounts of data at a time, while optim...
SIGSOFT
2005
ACM
14 years 8 months ago
2005
ACM
We present Arithmetic Program Paths, a novel, efficient way to compress program control-flow traces that reduces program bit traces to less than a fifth of their original size whi...
TVLSI
2010
13 years 2 months ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...