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CODES
2005
IEEE
15 years 10 months ago
Memory access optimizations in instruction-set simulators
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
Mehrdad Reshadi, Prabhat Mishra
CBSE
2008
Springer
15 years 6 months ago
A Component Model for Control-Intensive Distributed Embedded Systems
Abstract. In this paper we focus on design of a class of distributed embedded systems that primarily perform real-time controlling tasks. We propose a two-layer component model for...
Séverine Sentilles, Aneta Vulgarakis, Tom&a...
WSC
2001
15 years 5 months ago
Choosing among seven bases
In this paper, the selection of a BASE Case was every bit as important as the simulation itself. The production team had been familiar with simulations and had used their results ...
Stuart Gittlitz
ISLPED
1995
ACM
100views Hardware» more  ISLPED 1995»
15 years 8 months ago
Simultaneous scheduling and binding for power minimization during microarchitecture synthesis
ABSTRACT { Sub-micron technologies and the increasing size and complexity of integrated components have aggravated the e ect of long interconnects and buses, compared to that of ga...
Aurobindo Dasgupta, Ramesh Karri
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
15 years 8 months ago
Efficient hardware checkpointing: concepts, overhead analysis, and implementation
Progress in reconfigurable hardware technology allows the implementation of complete SoCs in today's FPGAs. In the context design for reliability, software checkpointing is a...
Dirk Koch, Christian Haubelt, Jürgen Teich