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    ASAP
    2005
    IEEE
    133views Hardware» more  ASAP 2005»
    Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware
    14 years 29 days ago
    Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware
    Download  www.vlsi.ee.upatras.gr
    In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
    Michalis D. Galanis, Grigoris Dimitroulakos, Costa...
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    DATE
    2005
    IEEE
    154views Hardware» more  DATE 2005»
    A Time Slice Based Scheduler Model for System Level Design
    14 years 29 days ago
    A Time Slice Based Scheduler Model for System Level Design
    Download  www.date-conference.com
    Efficient evaluation of design choices, in terms of selection of algorithms to be implemented as hardware or software, and finding an optimal hw/sw design mix is an important re...
    Luciano Lavagno, Claudio Passerone, Vishal Shah, Y...
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    DELTA
    2006
    IEEE
    88views Information Technology» more  DELTA 2006»
    Static Code Analysis of Functional Descriptions in SystemC
    14 years 1 months ago
    Static Code Analysis of Functional Descriptions in SystemC
    Download  publik.tuwien.ac.at
    The co-design of hardware and software systems with object oriented design languages like SystemC has become very popular. Static analysis of those descriptions allows to conduct ...
    Martin Holzer 0002, Markus Rupp
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    DAC
    2008
    ACM
    125views Computer Architecture» more  DAC 2008»
    Multiprocessor performance estimation using hybrid simulation
    14 years 8 months ago
    Multiprocessor performance estimation using hybrid simulation
    Download  www.iss.rwth-aachen.de
    With the growing number of programmable processing elements in today's MultiProcessor System-on-Chip (MPSoC) designs, the synergy required for the development of the hardware...
    Lei Gao, Kingshuk Karuri, Stefan Kraemer, Rainer L...
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    DAC
    2006
    ACM
    138views Computer Architecture» more  DAC 2006»
    Efficient detection and exploitation of infeasible paths for software timing analysis
    14 years 8 months ago
    Efficient detection and exploitation of infeasible paths for software timing analysis
    Download  www.comp.nus.edu.sg
    Accurate estimation of the worst-case execution time (WCET) of a program is important for real-time embedded software. Static WCET estimation involves program path analysis and ar...
    Vivy Suhendra, Tulika Mitra, Abhik Roychoudhury, T...
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