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IJNSEC
2008
146views more  IJNSEC 2008»
13 years 10 months ago
Formal Protocol Design of ESIKE Based on Authentication Tests
In this paper, we first present a concrete formal protocol design approach, which is based on authentication tests, to create an Efficient and Secure Internet Key Exchange (ESIKE)...
Rui Jiang, Aiqun Hu, Jianhua Li
ATS
2009
IEEE
99views Hardware» more  ATS 2009»
14 years 4 months ago
Test Generation for Designs with On-Chip Clock Generators
High performance designs often use the on-chip device PLLs for accurate test clock generation during testing. The on-chip clock generator is designed in a programmable way to faci...
Xijiang Lin, Mark Kassab
SEW
2006
IEEE
14 years 3 months ago
Pseudo-Exhaustive Testing for Software
Pseudo-exhaustive testing uses the empirical observation that, for broad classes of software, a fault is likely triggered by only a few variables interacting. The method takes adv...
D. Richard Kuhn, Vadim Okun
VTS
2005
IEEE
96views Hardware» more  VTS 2005»
14 years 3 months ago
Implementing a Scheme for External Deterministic Self-Test
A new method for test resource partitioning is introduced which keeps the design-for-test logic independent of the test set and moves the test pattern dependent information to an ...
Abdul Wahid Hakmi, Hans-Joachim Wunderlich, Valent...
ITC
2003
IEEE
205views Hardware» more  ITC 2003»
14 years 3 months ago
H-DFT: A Hybrid DFT Architecture For Low-Cost High Quality Structural Testing
This paper describes a Hybrid DFT (H-DFT) architecture for low-cost, high quality structural testing in the high volume manufacturing (HVM) environment. This structure efficiently...
David M. Wu, Mike Lin, Subhasish Mitra, Kee Sup Ki...