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ETS
2007
IEEE
94views Hardware» more  ETS 2007»
14 years 4 months ago
An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Therefore embedded memories are commonly equipped with spare r...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...
CSREAESA
2008
13 years 11 months ago
BIST-BASED Group Testing for Diagnosis of Embedded FPGA Cores
A group testing-based BIST technique to identify faulty hard cores in FPGA devices is presented. The method provides for isolation of faults in embedded cores as demonstrated by ex...
Alireza Sarvi, Carthik A. Sharma, Ronald F. DeMara
CAV
2006
Springer
209views Hardware» more  CAV 2006»
14 years 1 months ago
CUTE and jCUTE: Concolic Unit Testing and Explicit Path Model-Checking Tools
CUTE, a Concolic Unit Testing Engine for C and Java, is a tool to systematically and automatically test sequential C programs (including pointers) and concurrent Java programs. CUT...
Koushik Sen, Gul Agha
DATE
1999
IEEE
85views Hardware» more  DATE 1999»
14 years 2 months ago
At-Speed Boundary-Scan Interconnect Testing in a Board with Multiple System Clocks
As an at-speed solution to board-level interconnect testing, an enhanced boundary-scan architecture utilizing a combination of slightly modified boundary-scan cells and a user-def...
Jongchul Shin, Hyunjin Kim, Sungho Kang
EOR
2002
71views more  EOR 2002»
13 years 9 months ago
Non-parametric tests of returns to scale
This paper discusses various statistics for testing hypotheses regarding returns to scale in the context of non-parametric models of technical efficiency. In addition, the paper p...
Léopold Simar, Paul W. Wilson