230 search results - page 28 / 46 » Efficient algorithms for acceptable design exploration |
ISCAS
2003
IEEE
14 years 28 days ago
2003
IEEE
In this paper, we propose a fast pipeline VLSI architecture for 1D lifting-based discrete wavelet transform (DWT). This design method merges the filtering steps called the predict...
CCR
2010
13 years 7 months ago
2010
We present a sophisticated framework to systematically explore the temporal correlation in environmental monitoring wireless sensor networks. The presented framework optimizes los...
DAC
1998
ACM
13 years 12 months ago
1998
ACM
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
VVS
1995
IEEE
13 years 11 months ago
1995
IEEE
This paper explores the use of multi-dimensional trees to provide spatial and temporal e ciencies in imaging large data sets. Each node of the tree contains a model of the data in...
ICMCS
2005
IEEE
14 years 1 months ago
2005
IEEE
As the VLSI technology advances continuously, ASIC can easily achieve the required performance and most of them are actually over-designed. Thus, architecture shrinking is inevita...