598 search results - page 69 / 120 » Efficient and User-Friendly Verification |
ICCAD
1996
IEEE
14 years 3 months ago
1996
IEEE
-- In this tutorial we discuss concepts and techniques for the accurate and efficient modeling and extraction of interconnect parasitics in VLSI designs. Due toincreasing operating...
RTSS
1996
IEEE
14 years 2 months ago
1996
IEEE
We propose a method for reducing the number of clocks of a timed automaton by combining two algorithms. The first one consists in detecting active clocks, that is, those clocks wh...
ICALP
2000
Springer
14 years 2 months ago
2000
Springer
In this paper we investigate timed polyhedra, i.e. polyhedra which are finite unions of full dimensional simplices of a special kind. Such polyhedra form the basis of timing analys...
ASPDAC
1995
ACM
14 years 2 months ago
1995
ACM
- In this paper, we present a hardware-software cosimulation environment for heterogeneoussystems. To be an efficient system verification environment for the rapid prototyping of h...
EURODAC
1995
IEEE
14 years 2 months ago
1995
IEEE
Verification of image processing systems is mainly done on the basis of image sequence simulations. To achieve high simulation efficiency, our compiled code simulator MSIPC offers...