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DATE
2007
IEEE
81views Hardware» more  DATE 2007»
14 years 2 months ago
Using the inter- and intra-switch regularity in NoC switch testing
This paper proposes an efficient test methodology to test switches in a Network-on-Chip (NoC) architecture. A switch in an NoC consists of a number of ports and a router. Using th...
Mohammad Hosseinabady, Atefe Dalirsani, Zainalabed...
DAC
2007
ACM
14 years 8 months ago
RISPP: Rotating Instruction Set Processing Platform
Adaptation in embedded processing is key in order to address efficiency. The concept of extensible embedded processors works well if a few a-priori known hot spots exist. However,...
Jörg Henkel, Lars Bauer, Muhammad Shafique, S...
IJPP
2006
145views more  IJPP 2006»
13 years 7 months ago
Deterministic Parallel Processing
Abstract. In order to address the problems faced in the wireless communications domain, picoChip has devised the picoArrayTM . The picoArrayTM is a tiled-processor architecture, co...
Gajinder Panesar, Daniel Towner, Andrew Duller, Al...
TPDS
2008
113views more  TPDS 2008»
13 years 7 months ago
Evaluating a High-Level Parallel Language (GpH) for Computational GRIDs
Computational Grids potentially offer low cost, readily available, and large-scale high-performance platforms. For the parallel execution of programs, however, computational GRIDs ...
Abdallah Al Zain, Philip W. Trinder, Greg Michaels...
CORR
2002
Springer
122views Education» more  CORR 2002»
13 years 7 months ago
Fair Stateless Aggregate Traffic Marking using Active Queue Management Techniques
Abstract--In heterogeneous networks such as today's Internet, the differentiated services architecture promises to provide QoS guarantees through scalable service differentiat...
Abhimanyu Das, Debojyoti Dutta, Ahmed Helmy