5 search results - page 1 / 1 » Efficient built-in self-test algorithm for memory |
ATS
2000
IEEE
14 years 3 months ago
2000
IEEE
We present a new pseudorandom testing algorithm for the Built-In Self-Test (BIST) of DRAM. In this algorithm, test patterns are complemented to generate state-transitions that are...
DATE
2010
IEEE
14 years 4 months ago
2010
IEEE
Abstract—Built-In Self-Test (BIST) is less often applied to random logic than to embedded memories due to the following reasons: Firstly, for a satisfiable fault coverage it may...
ETS
2007
IEEE
14 years 5 months ago
2007
IEEE
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Therefore embedded memories are commonly equipped with spare r...
ICES
2000
Springer
14 years 2 months ago
2000
Springer
Testing is a key issue in the design and production of digital circuits: the adoption of BIST (Built-In Self-Test) techniques is increasingly popular, but requires efficient algori...
ATS
1998
IEEE
14 years 3 months ago
1998
IEEE
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...