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» Efficient checker processor design
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HPCA
2005
IEEE
14 years 1 months ago
Power Efficient Processor Architecture and The Cell Processor
This paper provides a background and rationale for some of the architecture and design decisions in the Cell processor, a processor optimized for compute-intensive and broadband r...
H. Peter Hofstee
DATE
2004
IEEE
129views Hardware» more  DATE 2004»
13 years 11 months ago
On the Design and Verification Methodology of the Look-Aside Interface
In this paper, we present a technique to design and verify the Look-Aside (LA-1) Interface standard used in network processors. Our design flow includes several refinements starti...
Ali Habibi, Asif Iqbal Ahmed, Otmane Aït Moha...
GI
2007
Springer
13 years 11 months ago
Creating Test-Cases Incrementally with Model-Checkers
: Test-case generation with model-checkers is a promising field of research in software testing. Model-checker based approaches offer many advantages: They are fully automated, the...
Gordon Fraser, Franz Wotawa
ACSD
2003
IEEE
103views Hardware» more  ACSD 2003»
14 years 21 days ago
Design Validation of ZCSP with SPIN
— We consider the problem of specifying a model of the Zero Copy Secured Protocol for the purpose of LTL verification with the SPIN Model Checker. ZCSP is based on Direct Memory...
Vincent Beaudenon, Emmanuelle Encrenaz, Jean Lou D...
ISLPED
2000
ACM
101views Hardware» more  ISLPED 2000»
13 years 11 months ago
Design issues for dynamic voltage scaling
Processors in portable electronic devices generally have a computational load which has time-varying performance requirements. Dynamic Voltage Scaling is a method to vary the proc...
Thomas D. Burd, Robert W. Brodersen