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HPCA
2008
IEEE
14 years 8 months ago
Power-Efficient DRAM Speculation
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
Nidhi Aggarwal, Jason F. Cantin, Mikko H. Lipasti,...
CAMP
2005
IEEE
13 years 9 months ago
Energy/Performance Evaluation of the Multithreaded Extension of a Multicluster VLIW Processor
Abstract— In this paper we address the problem of the architectural exploration from the energy/performance point of view of a VLIW processor for embedded systems. We also consid...
Domenico Barretta, Gianluca Palermo, Mariagiovanna...
HPCA
2012
IEEE
12 years 3 months ago
BulkSMT: Designing SMT processors for atomic-block execution
Multiprocessor architectures that continuously execute atomic blocks (or chunks) of instructions can improve performance and software productivity. However, all of the prior propo...
Xuehai Qian, Benjamin Sahelices, Josep Torrellas
CSE
2008
IEEE
13 years 9 months ago
Exploiting Intensive Multithreading for the Efficient Simulation of 3D Seismic Wave Propagation
Parallel computing is widely used for large scale threedimensional simulation of seismic wave propagation. One particularity of most of these simulations is to consider a finite c...
Fabrice Dupros, Hideo Aochi, Ariane Ducellier, Dim...
DAC
1996
ACM
13 years 11 months ago
Symphony: A Simulation Backplane for Parallel Mixed-Mode Co-Simulation of VLSI Systems
In this paper we present an integrated simulation paradigm in which parallel mixed-mode co-simulation is accomplished by integrating sequential simulators in a software simulation ...
Antonio R. W. Todesco, Teresa H. Y. Meng