555 search results - page 89 / 111 » Efficient event-driven simulation of parallel processor arch... |
CAL
2008
13 years 9 months ago
2008
Network-on-Chips (NoCs) outperform buses in terms of scalability, parallelism and system modularity and therefore are considered as the main interconnect infrastructure in future c...
IPPS
2003
IEEE
14 years 2 months ago
2003
IEEE
In this paper we propose a novel architecture, CARD, for resource discovery in large scale MANets that may scale up to thousands of nodes. Our mechanism is suitable for resource d...
IPPS
2005
IEEE
14 years 2 months ago
2005
IEEE
The InfiniBandTM Architecture (IBA) is a new promising I/O communication standard positioned for building clusters and System Area Networks (SANs). However, the IBA specification ...
ASAP
2005
IEEE
14 years 2 months ago
2005
IEEE
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
HPCA
2003
IEEE
14 years 9 months ago
2003
IEEE
To continue to improve processor performance, microarchitects seek to increase the effective instruction level parallelism (ILP) that can be exploited in applications. A fundament...