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ICCAD
2006
IEEE
146views Hardware» more  ICCAD 2006»
14 years 29 days ago
Cost-aware synthesis of asynchronous circuits based on partial acknowledgement
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...
Yu Zhou, Danil Sokolov, Alexandre Yakovlev
EAGC
2004
Springer
13 years 10 months ago
Support for User-Defined Metrics in the Online Performance Analysis Tool G-PM
This paper presents the support for user-defined metrics in the G-PM performance analysis tool. G-PM addresses the demand for aggressive optimisation of Grid applications by using ...
Roland Wismüller, Marian Bubak, Wlodzimierz F...
ETS
2007
IEEE
94views Hardware» more  ETS 2007»
14 years 1 months ago
An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Therefore embedded memories are commonly equipped with spare r...
Philipp Öhler, Sybille Hellebrand, Hans-Joach...
DAC
2003
ACM
14 years 7 months ago
Compiler-generated communication for pipelined FPGA applications
In this paper, we describe a set of compiler analyses and an implementation that automatically map a sequential and un-annotated C program into a pipelined implementation, targete...
Heidi E. Ziegler, Mary W. Hall, Pedro C. Diniz
DATE
2004
IEEE
154views Hardware» more  DATE 2004»
13 years 10 months ago
MultiNoC: A Multiprocessing System Enabled by a Network on Chip
The MultiNoC system implements a programmable onchip multiprocessing platform built on top of an efficient, low area overhead intra-chip interconnection scheme. The employed inter...
Aline Mello, Leandro Möller, Ney Calazans, Fe...