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» Efficient hardware code generation for FPGAs
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ECMDAFA
2006
Springer
142views Hardware» more  ECMDAFA 2006»
13 years 11 months ago
Constraint Support in MDA Tools: A Survey
: The growing interest in the MDA (Model-Driven Architecture) and MDD (Model-Driven Development) approaches has largely increased the number of tools and methods including code-gen...
Jordi Cabot, Ernest Teniente
FCCM
1999
IEEE
134views VLSI» more  FCCM 1999»
13 years 12 months ago
Runlength Compression Techniques for FPGA Configurations
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
Scott Hauck, William D. Wilson
ISCAS
2003
IEEE
114views Hardware» more  ISCAS 2003»
14 years 25 days ago
On the hardware implementations of the SHA-2 (256, 384, 512) hash functions
Couple to the communications wired and unwired networks growth, is the increasing demand for strong secure data transmission. New cryptographic standards are developed, and new en...
Nicolas Sklavos, Odysseas G. Koufopavlou
DATE
2004
IEEE
181views Hardware» more  DATE 2004»
13 years 11 months ago
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models
Retargetable C compilers are key tools for efficient architecture exploration for embedded processors. In this paper we describe a novel approach to retargetable compilation based...
Manuel Hohenauer, Hanno Scharwächter, Kingshu...
CODES
2010
IEEE
13 years 4 months ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...