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ICCAD
1994
IEEE
76views Hardware» more  ICCAD 1994»
13 years 10 months ago
An efficient procedure for the synthesis of fast self-testable controller structures
The BIST implementation of a conventionally synthesized controller in most cases requires the integration of an additional register only for test purposes. This leads to some seri...
Sybille Hellebrand, Hans-Joachim Wunderlich
DFT
2006
IEEE
125views VLSI» more  DFT 2006»
14 years 23 days ago
Synthesis of Efficient Linear Test Pattern Generators
This paper presents a procedure for Synthesis of LINear test pattern Generators called SLING. SLING can synthesize linear test pattern generators that satisfy constraints on area,...
Avijit Dutta, Nur A. Touba
ASPDAC
2008
ACM
95views Hardware» more  ASPDAC 2008»
13 years 8 months ago
MeshWorks: An efficient framework for planning, synthesis and optimization of clock mesh networks
A leaf-level clock mesh is known to be very tolerant to variations [1]. However, its use is limited to a few high-end designs because of the high power/resource requirements and la...
Anand Rajaram, David Z. Pan
ERSA
2004
129views Hardware» more  ERSA 2004»
13 years 8 months ago
A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
Jingzhao Ou, Viktor K. Prasanna
CVGIP
2008
108views more  CVGIP 2008»
13 years 6 months ago
Efficient texture synthesis using strict Wang Tiles
Wang Tiles are constructed from four texture samples, arranged so they can always match a choice of other tiles at two edges. Because they are precomputed, Wang Tiles are a very e...
Xinyu Zhang, Young J. Kim