555 search results - page 72 / 111 » Efficiently Implementing Episodic Memory |
ISQED
2002
IEEE
14 years 1 months ago
2002
IEEE
This paper presents a hybrid BIST architecture and methods for optimizing it to test systems-on-chip in a cost effective way. The proposed self-test architecture can be implemente...
MICRO
2000
IEEE
14 years 1 months ago
2000
IEEE
Virtual machine service threads can perform many tasks in parallel with program execution such as garbage collection, dynamic compilation, and profile collection and analysis. Har...
IPPS
1998
IEEE
14 years 27 days ago
1998
IEEE
We have developed a programming model that integrates concurrency with object-based programming. The model includes features for object definition and instantiation, and it support...
ASPDAC
2007
ACM
14 years 20 days ago
2007
ACM
Clock skew scheduling is a technique that intentionally introduces skews to memory elements to improve the performance of a sequential circuit. It was shown in [21] that the full ...
DFT
2004
IEEE
14 years 12 days ago
2004
IEEE
This paper addresses the problem of test response compaction. In order to maximize compaction ratio, a single-output encoder based on check matrix of a (n, n1, m, 3) convolutional...