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» Efficiently generating test vectors with state pruning
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VLSID
2005
IEEE
120views VLSI» more  VLSID 2005»
14 years 1 months ago
On Finding Consecutive Test Vectors in a Random Sequence for Energy-Aware BIST Design
During pseudorandom testing, a significant amount of energy and test application time is wasted for generating and for applying “useless” test vectors that do not contribute t...
Sheng Zhang, Sharad C. Seth, Bhargab B. Bhattachar...
GLVLSI
2009
IEEE
323views VLSI» more  GLVLSI 2009»
13 years 5 months ago
MYGEN: automata-based on-line test generator for assertion-based verification
To assist in dynamic assertion-based verification, we present a method to automatically build a test vector generator from a temporal property. Based on the duality between monito...
Yann Oddos, Katell Morin-Allory, Dominique Borrion...
FPGA
2000
ACM
114views FPGA» more  FPGA 2000»
13 years 11 months ago
Generating highly-routable sparse crossbars for PLDs
A method for evaluating and constructing sparse crossbars which are both area efficient and highly routable is presented. The evaluation method uses a network flow algorithm to ac...
Guy G. Lemieux, Paul Leventis, David M. Lewis
ATS
2009
IEEE
113views Hardware» more  ATS 2009»
14 years 2 months ago
Deterministic Algorithms for ATPG under Leakage Constraints
—Measuring the steady state leakage current (IDDQ) is very successful in detecting faults not discovered by standard fault models. But vector dependencies of IDDQ decrease the re...
Gorschwin Fey
IFIP
2001
Springer
13 years 12 months ago
Functional Test Generation using Constraint Logic Programming
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre