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GLVLSI
2010
IEEE
190views VLSI» more  GLVLSI 2010»
13 years 11 months ago
A linear statistical analysis for full-chip leakage power with spatial correlation
In this paper, we present an approved linear-time algorithm for statistical leakage analysis in the present of any spatial correlation condition (strong or weak). The new algorith...
Ruijing Shen, Sheldon X.-D. Tan, Jinjun Xiong
ICCAD
2001
IEEE
107views Hardware» more  ICCAD 2001»
14 years 6 months ago
A Convex Programming Approach to Positive Real Rational Approximation
As system integration evolves and tighter design constraints must be met, it becomes necessary to account for the non-ideal behavior of all the elements in a system. Certain devic...
Carlos P. Coelho, Joel R. Phillips, Luis Miguel Si...
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
14 years 2 months ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi
FPGA
2010
ACM
250views FPGA» more  FPGA 2010»
14 years 6 months ago
Variation-aware placement for FPGAs with multi-cycle statistical timing analysis
Deep submicron processes have allowed FPGAs to grow in complexity and speed. However, such technology scaling has caused FPGAs to become more susceptible to the effects of process...
Gregory Lucas, Chen Dong, Deming Chen
ISPD
2010
ACM
207views Hardware» more  ISPD 2010»
14 years 4 months ago
FOARS: FLUTE based obstacle-avoiding rectilinear steiner tree construction
Obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) construction is becoming one of the most sought after problems in modern design flow. In this paper we present FOARS, ...
Gaurav Ajwani, Chris Chu, Wai-Kei Mak