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VLSID
2008
IEEE
149views VLSI» more  VLSID 2008»
14 years 10 months ago
NBTI Degradation: A Problem or a Scare?
Negative Bias Temperature Instability (NBTI) has been identified as a major and critical reliability issue for PMOS devices in nano-scale designs. It manifests as a negative thres...
Kewal K. Saluja, Shriram Vijayakumar, Warin Sootka...
ASYNC
2000
IEEE
122views Hardware» more  ASYNC 2000»
14 years 2 months ago
DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits
Fault Abstraction and Collapsing Framework for Asynchronous Circuits Philip P. Shirvani, Subhasish Mitra Center for Reliable Computing Stanford University Stanford, CA Jo C. Eberge...
Philip P. Shirvani, Subhasish Mitra, Jo C. Ebergen...
ERCIMDL
2000
Springer
88views Education» more  ERCIMDL 2000»
14 years 1 months ago
Modeling Archival Repositories for Digital Libraries
This paper studies the archival problem: how a digital library can preserve electronic documents over long periods of time. We analyze how an archival repository can fail and we p...
Arturo Crespo, Hector Garcia-Molina
DFT
2003
IEEE
145views VLSI» more  DFT 2003»
14 years 3 months ago
System-Level Analysis of Fault Effects in an Automotive Environment
In the last years, new requirements in terms of vehicle performance increased significantly the amount of on-board electronics, thus raising more concern about safety and fault to...
Fulvio Corno, S. Tosato, P. Gabrielli
DAC
2007
ACM
14 years 11 months ago
Statistical Analysis of Full-Chip Leakage Power Considering Junction Tunneling Leakage
In this paper we address the the growing issue of junction tunneling leakage (Ijunc) at the circuit level. Specifically, we develop a fast approach to analyze the state-dependent ...
Tao Li, Zhiping Yu