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DAC
2006
ACM
14 years 1 months ago
Refined statistical static timing analysis through
Statistical static timing analysis (SSTA) has been a popular research topic in recent years. A fundamental issue with applying SSTA in practice today is the lack of reliable and e...
Benjamin N. Lee, Li-C. Wang, Magdy S. Abadir
ICCAD
2002
IEEE
142views Hardware» more  ICCAD 2002»
14 years 6 months ago
SAT and ATPG: Boolean engines for formal hardware verification
In this survey, we outline basic SAT- and ATPGprocedures as well as their applications in formal hardware verification. We attempt to give the reader a trace trough literature and...
Armin Biere, Wolfgang Kunz
DAC
2010
ACM
13 years 8 months ago
SCEMIT: a systemc error and mutation injection tool
As high-level models in C and SystemC are increasingly used for verification and even design (through high-level synthesis) of electronic systems, there is a growing need for com...
Peter Lisherness, Kwang-Ting (Tim) Cheng
CASES
2010
ACM
13 years 6 months ago
Optimizing energy to minimize errors in dataflow graphs using approximate adders
Approximate arithmetic is a promising, new approach to lowenergy designs while tackling reliability issues. We present a method to optimally distribute a given energy budget among...
Zvi M. Kedem, Vincent John Mooney, Kirthi Krishna ...
ISSS
1996
IEEE
169views Hardware» more  ISSS 1996»
14 years 2 months ago
The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems
The application range of the embedded computing is going to cover the majority of the market products spanning from consumer electronic, automotive, telecom and process control. F...
Alessandro Balboni, William Fornaciari, M. Vincenz...