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CC
2010
Springer
190views System Software» more  CC 2010»
14 years 2 months ago
Is Reuse Distance Applicable to Data Locality Analysis on Chip Multiprocessors?
On Chip Multiprocessors (CMP), it is common that multiple cores share certain levels of cache. The sharing increases the contention in cache and memory-to-chip bandwidth, further h...
Yunlian Jiang, Eddy Z. Zhang, Kai Tian, Xipeng She...
SG
2005
Springer
14 years 26 days ago
Multi-level Interaction in Parametric Design
Parametric design systems model a design as a constrained collection of schemata. Designers work in such systems at two levels: definition of schemata and constraints; and search w...
Robert Aish, Robert Woodbury
ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
13 years 9 months ago
Translation caching: skip, don't walk (the page table)
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
Thomas W. Barr, Alan L. Cox, Scott Rixner
SIGMOD
2010
ACM
221views Database» more  SIGMOD 2010»
13 years 7 months ago
Analyzing the energy efficiency of a database server
Rising energy costs in large data centers are driving an agenda for energy-efficient computing. In this paper, we focus on the role of database software in affecting, and, ultimat...
Dimitris Tsirogiannis, Stavros Harizopoulos, Mehul...
DAC
2008
ACM
14 years 8 months ago
Multithreaded simulation for synchronous dataflow graphs
Synchronous dataflow (SDF) has been successfully used in design tools for system-level simulation of wireless communication systems. Modern wireless communication standards involv...
Chia-Jui Hsu, José Luis Pino, Shuvra S. Bha...