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ICSE
2001
IEEE-ACM
14 years 1 months ago
A Web-Oriented Architectural Aspect for the Emerging Computational Tapestry
An emerging tapestry of computations will soon integrate systems around the globe. It will evolve without central control. Its complexity will be vast. We need new ideas, tools an...
Kevin J. Sullivan, Avneesh Saxena
CASES
2001
ACM
14 years 27 days ago
Application specific architectures: a recipe for fast, flexible and power efficient designs
The general purpose processor has long been the focus of intense optimization efforts that have resulted in an impressive doubling of performance every 18 months. However, recent ...
Christopher T. Weaver, Rajeev Krishna, Lisa Wu, To...
EDCC
2008
Springer
13 years 11 months ago
A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR
The ongoing technological advances in the semiconductor industry make Multi-Processor System-on-a-Chips (MPSoCs) more attractive, because uniprocessor solutions do not scale satis...
Roman Obermaisser, Hubert Kraut, Christian El Sall...
CODES
2008
IEEE
14 years 3 months ago
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...
IESS
2007
Springer
120views Hardware» more  IESS 2007»
14 years 3 months ago
Error Containment in the Time-Triggered System-On-a-Chip Architecture
Abstract: The time-triggered System-on-a-Chip (SoC) architecture provides a generic multicore system platform for a family of composable and dependable giga-scale SoCs. It supports...
Roman Obermaisser, Hermann Kopetz, Christian El Sa...