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ISCA
2003
IEEE
169views Hardware» more  ISCA 2003»
14 years 2 months ago
Virtual Simple Architecture (VISA): Exceeding the Complexity Limit in Safe Real-Time Systems
Meeting deadlines is a key requirement in safe realtime systems. Worst-case execution times (WCET) of tasks are needed for safe planning. Contemporary worst-case timing analysis t...
Aravindh Anantaraman, Kiran Seth, Kaustubh Patil, ...
FAST
2008
13 years 10 months ago
Enhancing Storage System Availability on Multi-Core Architectures with Recovery-Conscious Scheduling
In this paper we develop a recovery conscious framework for multi-core architectures and a suite of techniques for improving the resiliency and recovery efficiency of highly conc...
Sangeetha Seshadri, Lawrence Chiu, Cornel Constant...
JPDC
2007
167views more  JPDC 2007»
13 years 9 months ago
On the design of high-performance algorithms for aligning multiple protein sequences on mesh-based multiprocessor architectures
In this paper, we address the problem of multiple sequence alignment (MSA) for handling very large number of proteins sequences on mesh-based multiprocessor architectures. As the ...
Diana H. P. Low, Bharadwaj Veeravalli, David A. Ba...
DAC
2003
ACM
14 years 10 months ago
Dynamic hardware/software partitioning: a first approach
Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy co...
Greg Stitt, Roman L. Lysecky, Frank Vahid
VLSID
2002
IEEE
149views VLSI» more  VLSID 2002»
14 years 9 months ago
Functional Partitioning for Low Power Distributed Systems of Systems-on-a-Chip
In this paper, we present a functional partitioning method for low power real-time distributed embedded systems whose constituent nodes are systems-on-a-chip (SOCs). The systemlev...
Yunsi Fei, Niraj K. Jha