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SAMOS
2010
Springer
13 years 8 months ago
Interleaving granularity on high bandwidth memory architecture for CMPs
—Memory bandwidth has always been a critical factor for the performance of many data intensive applications. The increasing processor performance, and the advert of single chip m...
Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex...
DATE
2005
IEEE
110views Hardware» more  DATE 2005»
14 years 3 months ago
Test Time Reduction Reusing Multiple Processors in a Network-on-Chip Based Architecture
The increasing complexity and the short life cycles of embedded systems are pushing the current system-onchip designs towards a rapid increasing on the number of programmable proc...
Alexandre M. Amory, Marcelo Lubaszewski, Fernando ...
SAMOS
2010
Springer
13 years 8 months ago
Programming multi-core architectures using Data-Flow techniques
Abstract—In this paper we present a Multithreaded programming methodology for multi-core systems that utilizes DataFlow concurrency. The programmer augments the program with macr...
Samer Arandi, Paraskevas Evripidou
DAC
2000
ACM
14 years 10 months ago
Interactive co-design of high throughput embedded multimedia
The idea of Force-Directed Scheduling (FDS) was first introduced by Paulin and Knight to minimize the number of resources required in the high-level synthesis of high-throughput A...
Thierry J.-F. Omnés, Thierry Franzetti, Fra...
DAC
1998
ACM
14 years 1 months ago
A Tool for Performance Estimation of Networked Embedded End-systems
Networked embedded systems are expected to support adaptive streaming audio/video applications with soft real-time constraints. These systems can be designed in a cost efficient ...
Asawaree Kalavade, Pratyush Moghé