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FPL
2004
Springer
144views Hardware» more  FPL 2004»
14 years 4 days ago
A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms
A recent trend towards integrating FPGAs with many heterogeneous components, such as memory systems, dedicated multipliers, etc., has made them an attractive option for implementin...
Jingzhao Ou, Viktor K. Prasanna
ISCA
2007
IEEE
167views Hardware» more  ISCA 2007»
14 years 2 months ago
New cache designs for thwarting software cache-based side channel attacks
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike physical side channel attacks that mostly target embedded cryptographic devices,...
Zhenghong Wang, Ruby B. Lee
DAC
2004
ACM
14 years 9 months ago
Profile-based optimal intra-task voltage scheduling for hard real-time applications
This paper presents a set of comprehensive techniques for the intratask voltage scheduling problem to reduce energy consumption in hard real-time tasks of embedded systems. Based ...
Jaewon Seo, Taewhan Kim, Ki-Seok Chung
FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
13 years 8 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
SAC
2008
ACM
13 years 7 months ago
ECG data provisioning for telehomecare monitoring
The latest computer and communication technologies in combination with an enhanced ECG analysis system can be used to improve cardiac patient's follow-up out-of-hospital. In ...
Bernardo Gonçalves, José Gonç...