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VTS
2005
IEEE
95views Hardware» more  VTS 2005»
14 years 27 days ago
SRAM Retention Testing: Zero Incremental Time Integration with March Algorithms
Testing data retention faults (DRFs), particularly in integrated systems on chip comprised of very large number of various sizes and types of embedded SRAMs is challenging and typ...
Baosheng Wang, Yuejian Wu, Josh Yang, André...
ATS
2003
IEEE
131views Hardware» more  ATS 2003»
14 years 19 days ago
Software-Based Delay Fault Testing of Processor Cores
Software-based self-testing is a promising approach for the testing of processor cores which are embedded inside a System-on-a-Chip (SoC), as it can apply test vectors in function...
Virendra Singh, Michiko Inoue, Kewal K. Saluja, Hi...
TOOLS
2000
IEEE
13 years 11 months ago
Testing-for-Trust: The Genetic Selection Model Applied to Component Qualification
This paper presents a method and a tool for building trustable OO components. The methodology is based on an integrated design and test approach for OO software components. It is ...
Benoit Baudry, Vu Le Hanh, Yves Le Traon
ECRIME
2007
13 years 11 months ago
Getting users to pay attention to anti-phishing education: evaluation of retention and transfer
Educational materials designed to teach users not to fall for phishing attacks are widely available but are often ignored by users. In this paper, we extend an embedded training m...
Ponnurangam Kumaraguru, Yong Rhee, Steve Sheng, Sh...
ETS
2006
IEEE
108views Hardware» more  ETS 2006»
14 years 1 months ago
A DFT Architecture for Asynchronous Networks-on-Chip
The Networks-on-Chip (NoCs) paradigm is emerging as a solution for the communication of SoCs. Many NoC architecture propositions are presented but few works on testing these netwo...
Xuan-Tu Tran, Jean Durupt, François Bertran...