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» Embedded floating-point units in FPGAs
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FCCM
2008
IEEE
99views VLSI» more  FCCM 2008»
14 years 4 months ago
DSPs, BRAMs and a Pinch of Logic: New Recipes for AES on FPGAs
We present an AES cipher implementation that is based on the BlockRAM and DSP units embedded within Xilinx’s Virtex-5 FPGAs. An iterative “basic” module outputs a 32 bit col...
Saar Drimer, Tim Güneysu, Christof Paar
IJCNN
2007
IEEE
14 years 3 months ago
A Hardware-friendly Support Vector Machine for Embedded Automotive Applications
— We present here a hardware–friendly version of the Support Vector Machine (SVM), which is useful to implement its feed–forward phase on limited–resources devices such as ...
Davide Anguita, Alessandro Ghio, Stefano Pischiutt...
FPL
2006
Springer
242views Hardware» more  FPL 2006»
14 years 1 months ago
TMD-MPI: An MPI Implementation for Multiple Processors Across Multiple FPGAs
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
Manuel Saldaña, Paul Chow
ICCAD
2006
IEEE
150views Hardware» more  ICCAD 2006»
14 years 6 months ago
Conjoining soft-core FPGA processors
Soft-core programmable processors on field-programmable gate arrays (FPGAs) can be custom synthesized to instantiate only those hardware units, such as multipliers and floating-po...
David Sheldon, Rakesh Kumar, Frank Vahid, Dean M. ...
CHES
2008
Springer
134views Cryptology» more  CHES 2008»
13 years 11 months ago
Ultra High Performance ECC over NIST Primes on Commercial FPGAs
Elliptic Curve Cryptosystems (ECC) have gained increasing acceptance in practice due to their significantly smaller bit size of the operands compared to other public-key cryptosyst...
Tim Güneysu, Christof Paar