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» Embedded system synthesis under memory constraints
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DFT
2006
IEEE
203views VLSI» more  DFT 2006»
14 years 1 months ago
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
Ondrej Novák, Zdenek Plíva, Jiri Jen...
ECBS
2006
IEEE
166views Hardware» more  ECBS 2006»
14 years 1 months ago
Model Transformations in the Model-Based Development of Real-time Systems
In this paper we argue for UML-based metamodeling and pattern-based graph transformation techniques in computer-based systems development through an illustrative example from the ...
Tivadar Szemethy, Gabor Karsai, Daniel Balasubrama...
ISVLSI
2006
IEEE
82views VLSI» more  ISVLSI 2006»
14 years 1 months ago
Optimal Periodical Memory Allocation for Logic-in-Memory Image Processors
One major issue in designing image processors is to design a memory system that supports parallel access with a simple interconnection network. This paper presents a design method...
Masanori Hariyama, Michitaka Kameyama, Yasuhiro Ko...
DATE
2010
IEEE
153views Hardware» more  DATE 2010»
14 years 15 days ago
Taming the component timing: A CBD methodology for real-time embedded systems
—The growing trend towards using component based design approach in embedded system development requires addressing newer system engineering challenges. These systems are usually...
Manoj G. Dixit, Pallab Dasgupta, S. Ramesh
ISCAS
2006
IEEE
116views Hardware» more  ISCAS 2006»
14 years 1 months ago
Neural network stream processing core (NnSP) for embedded systems
Abstract— NnSP is a stream-based programmable and codelevel statically reconfigurable processor for realization of neural networks in embedded systems. NnSP is provided with a n...
Hadi Esmaeilzadeh, Pooya Saeedi, Babak Nadjar Araa...