363 search results - page 20 / 73 » Enabling High Performance Data Transfer on Cluster Architect... |
184
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ISVLSI
2005
IEEE
15 years 9 months ago
2005
IEEE
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
119
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FPGA
1997
ACM
15 years 8 months ago
1997
ACM
This paper presents a novel system architecture applicable to high-performance and flexible transport data processing which includes complex protocol operation and a network contr...
157
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RSP
2005
IEEE
15 years 9 months ago
2005
IEEE
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
118
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CSREAESA
2004
15 years 5 months ago
2004
Adders are some of the most critical data path circuits requiring considerable design effort in order to "squeeze" out as much performance gain as possible. Many adder d...
ASPDAC
2005
ACM
15 years 6 months ago
2005
ACM
– We propose a System-on-Chip (SoC) architecture for reconfigurable applications based on the AMBA HighSpeed Bus (AHB). The architecture features multiple low-area flyby DMA bloc...