395 search results - page 18 / 79 » Encoding Algorithms for Logic Synthesis |
110
Voted
ASPDAC
2005
ACM
15 years 4 months ago
2005
ACM
- We present fast algorithms to synthesize exact minimal reversible circuits for various types of gates and costs. By reducing reversible logic synthesis problems to group theory p...
133
Voted
DATE
2000
IEEE
15 years 6 months ago
2000
IEEE
Pass Transistor Logic has attracted more and more interest during last years, since it has proved to be an attractive alternative to static CMOS designs with respect to area, perf...
107
Voted
FPGA
2009
ACM
15 years 9 months ago
2009
ACM
In recent years, the maximum logic capacity of each successive FPGA family has been increasing by more than 50%, which motivates scalable solutions. Meanwhile, academic research i...
120
click to vote
ICCAD
2010
IEEE
15 years 9 days ago
2010
IEEE
Craig Interpolation is a state-of-the-art technique for logic synthesis and verification, based on Boolean Satisfiability (SAT). Leveraging the efficacy of SAT algorithms, Craig In...
140
click to vote
FPL
2000
Springer
15 years 6 months ago
2000
Springer
This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state as...