Sciweavers

395 search results - page 32 / 79
» Encoding Algorithms for Logic Synthesis
Sort
View
ICCAD
2009
IEEE
119views Hardware» more  ICCAD 2009»
15 years 5 days ago
Iterative layering: Optimizing arithmetic circuits by structuring the information flow
Current logic synthesis techniques are ineffective for arithmetic circuits. They perform poorly for XOR-dominated circuits, and those with a high fan-in dependency between inputs ...
Ajay K. Verma, Philip Brisk, Paolo Ienne
DATE
2007
IEEE
102views Hardware» more  DATE 2007»
15 years 8 months ago
Accurate and scalable reliability analysis of logic circuits
Reliability of logic circuits is emerging as an important concern that may limit the benefits of continued scaling of process technology and the emergence of future technology al...
Mihir R. Choudhury, Kartik Mohanram
ASPDAC
2004
ACM
83views Hardware» more  ASPDAC 2004»
15 years 7 months ago
A procedure for obtaining a behavioral description for the control logic of a non-linear pipeline
Much attention has been directed to different aspects of the design of pipelines [1,2,3,4]. Design of the control logic of non-linear pipelines has however, been considered as a su...
Hashem Hashemi Najaf-abadi
ASYNC
2001
IEEE
136views Hardware» more  ASYNC 2001»
15 years 6 months ago
Efficient Exact Two-Level Hazard-Free Logic Minimization
This paper presents a new approach to two-level hazardfree sum-of-products logic minimization. No currently available minimizers for single-output literal-exact two-level hazard-f...
Chris J. Myers, Hans M. Jacobson
LOPSTR
2004
Springer
15 years 7 months ago
Graph-Based Proof Counting and Enumeration with Applications for Program Fragment Synthesis
For use in earlier approaches to automated module interface adaptation, we seek a restricted form of program synthesis. Given some typing assumptions and a desired result type, we ...
J. B. Wells, Boris Yakobowski