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» Encoding Algorithms for Logic Synthesis
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ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
15 years 11 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
CCE
2005
15 years 2 months ago
Logic-based outer approximation for globally optimal synthesis of process networks
Process network problems can be formulated as Generalized Disjunctive Programs where a logicbased representation is used to deal with the discrete and continuous decisions. A new ...
María Lorena Bergamini, Pío A. Aguir...
ISCAS
2008
IEEE
195views Hardware» more  ISCAS 2008»
15 years 8 months ago
Multi-view depth video coding using depth view synthesis
— Depth information indicates the distance of an object in the three dimensional (3D) scene from the camera view-point, typically represented by eight bits. Since the depth map i...
Sang-Tae Na, Kwan-Jung Oh, Cheon Lee, Yo-Sung Ho
GECCO
2003
Springer
167views Optimization» more  GECCO 2003»
15 years 7 months ago
Dimensionality Reduction via Genetic Value Clustering
Abstract. Feature extraction based on evolutionary search offers new possibilities for improving classification accuracy and reducing measurement complexity in many data mining and...
Alexander P. Topchy, William F. Punch
DATE
2002
IEEE
206views Hardware» more  DATE 2002»
15 years 7 months ago
Accurate Area and Delay Estimators for FPGAs
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
Anshuman Nayak, Malay Haldar, Alok N. Choudhary, P...